Larger system chips such as a System-on-a-Chip (SoC) often include analog as well as digital circuits. Signals may cross from the digital domain to the analog domain, and vice-versa. Analog signals may be converted to digital for complex processing, such as by a Digital Signal Processor (DSP), and results may be converted from digital to analog. Some system chips may be configurable to fit several applications, and these applications may have different requirements for analog-digital conversions. However, it is desirable to use the same analog-digital converter circuits for these varied applications.
Many types of Analog-to-Digital Converters (ADC's) have been used for a wide variety of applications. Flash ADC's compare analog signal voltages to multiple voltage levels in an instant to produce a multi-bit digital word that represents the analog voltage. Successive-approximation ADC's use a series of stages to convert an analog voltage to digital bits. Each stage compares an analog voltage to a reference voltage, producing one digital bit. In sub-ranging ADC's, each stage compares an analog voltage to several voltage levels, so that each stage produces several bits. Succeeding stages generate lower-significant digital bits than do earlier stages in the pipeline.
Algorithmic, re-circulating, or recycling ADC's use a loop to convert an analog voltage. The analog voltage is sampled and compared to produce a most-significant digital bit. Then the digital bit is converted back to analog and subtracted from the analog voltage to produce a residue voltage. The residue voltage is then multiplied by two and looped back to the comparator to generate the next digital bit. Thus the digital bits are generated over multiple cycles in the same comparator stage.
FIG. 1 shows a Successive-Approximation-Register ADC. Successive-Approximation-Register SAR 302 receives a clock CLK and contains a register value that is changed to gradually zero-in on a close approximation of the analog input voltage VIN. For example, the value in SAR 302 may first be 0.5, then 0.25, then 0.375, then 0.312, then 0.281, then 0.296, then 0.304, then 0.308, then 0.31, then 0.311, and finally 0.312 when comparing to a VIN of 0.312 volts. SAR 302 outputs the current register value to digital-to-analog converter (DAC) 300, which receives a reference voltage VREF and converts the register value to an analog voltage VA.
The input analog voltage VIN is applied to sample-and-hold circuit 304, which samples and holds the value of VIN. For example, a capacitor can be charged by VIN and then the capacitor isolated from VIN to hold the analog voltage. The sampled input voltage from sample-and-hold circuit 304 is applied to the inverting input of comparator 306. The converted analog voltage VA is applied to the non-inverting input of comparator 306.
Comparator 306 compares the converted analog voltage VA to the sampled input voltage and generates a high output when the converted analog voltage VA is above the sampled VIN, and the register value in SAR 302 is too high. The register value in SAR 302 can then be reduced.
When the converted analog voltage VA is below the sampled input voltage, comparator 306 generates a low output to SAR 302. The register value in SAR 302 is too low. The register value in SAR 302 can then be increased for the next cycle.
The register value from SAR 302 is a binary value of N bits, with D(N−1) being the most-significant-bit (MSB) and D0 being the least-significant-bit (LSB). SAR 302 can first set the MSB D(N−1), then compare the converted analog voltage VA to the input voltage VIN, then adjust the MSB and/or set the next MSB D(N−2) based on the comparison. The set and compare cycle repeats until after N cycles the LSB is set. After the last cycle, the end-of-cycle EOC signal is activated to signal completion. A state machine or other controller can be used with or included inside SAR 302 to control sequencing.
Since ADC's may be relatively large circuits, it is desirable to use ADC's for many applications. It is also desired to use some of the ADC circuits for conversion in the reverse direction, as a DAC. A dual-use circuit that can be used for both an ADC and a DAC is desirable. Circuit components that can be used for both an ADC and a DAC are desirable. A comparator stage that can be configured for use in an ADC and re-configured for use in a DAC is desirable.